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author | Takashi Iwai <tiwai@suse.de> | 2012-08-03 12:59:38 +0200 |
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committer | Takashi Iwai <tiwai@suse.de> | 2012-08-03 12:59:38 +0200 |
commit | d30a0d839a5a282e43353fee53d5dc70db5eceda (patch) | |
tree | 189a91615be3174a9ff8b20937359d11298433af /arch/mips/include/asm/mach-loongson1/regs-clk.h | |
parent | ALSA: emu10k1: Avoid access to invalid pages when period=1 (diff) | |
parent | ALSA: isa: Move snd_legacy_find_free_ioport to initval.h (diff) | |
download | linux-dev-d30a0d839a5a282e43353fee53d5dc70db5eceda.tar.xz linux-dev-d30a0d839a5a282e43353fee53d5dc70db5eceda.zip |
Merge branch 'topic/next' into for-next
Diffstat (limited to 'arch/mips/include/asm/mach-loongson1/regs-clk.h')
-rw-r--r-- | arch/mips/include/asm/mach-loongson1/regs-clk.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-loongson1/regs-clk.h b/arch/mips/include/asm/mach-loongson1/regs-clk.h new file mode 100644 index 000000000000..8efa7fb9f73a --- /dev/null +++ b/arch/mips/include/asm/mach-loongson1/regs-clk.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com> + * + * Loongson 1 Clock Register Definitions. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __ASM_MACH_LOONGSON1_REGS_CLK_H +#define __ASM_MACH_LOONGSON1_REGS_CLK_H + +#define LS1X_CLK_REG(x) \ + ((void __iomem *)KSEG1ADDR(LS1X_CLK_BASE + (x))) + +#define LS1X_CLK_PLL_FREQ LS1X_CLK_REG(0x0) +#define LS1X_CLK_PLL_DIV LS1X_CLK_REG(0x4) + +/* Clock PLL Divisor Register Bits */ +#define DIV_DC_EN (0x1 << 31) +#define DIV_DC (0x1f << 26) +#define DIV_CPU_EN (0x1 << 25) +#define DIV_CPU (0x1f << 20) +#define DIV_DDR_EN (0x1 << 19) +#define DIV_DDR (0x1f << 14) + +#define DIV_DC_SHIFT 26 +#define DIV_CPU_SHIFT 20 +#define DIV_DDR_SHIFT 14 + +#endif /* __ASM_MACH_LOONGSON1_REGS_CLK_H */ |