diff options
| author |   David Daney <ddaney@caviumnetworks.com> | 2009-04-23 17:44:38 -0700 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2009-06-17 11:06:25 +0100 |
| commit | e8635b484f644c7873e6091f15330c49396f2cbc (patch) | |
| tree | a12d2a4f22cd29d7b88c4df251eced3b43ea47a7 /arch/mips/include/asm/octeon/cvmx.h | |
| parent | MIPS: Add register definitions for PCI. (diff) | |
| download | linux-dev-e8635b484f644c7873e6091f15330c49396f2cbc.tar.xz linux-dev-e8635b484f644c7873e6091f15330c49396f2cbc.zip | |
MIPS: Add Cavium OCTEON PCI support.
This patch adds support for PCI and PCIe to the base Cavium OCTEON
processor support.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx.h')
| -rw-r--r-- | arch/mips/include/asm/octeon/cvmx.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h index 03fddfa3e928..e31e3fe14f8a 100644 --- a/arch/mips/include/asm/octeon/cvmx.h +++ b/arch/mips/include/asm/octeon/cvmx.h @@ -376,6 +376,18 @@ static inline uint64_t cvmx_get_cycle(void) } /** + * Wait for the specified number of cycle + * + */ +static inline void cvmx_wait(uint64_t cycles) +{ + uint64_t done = cvmx_get_cycle() + cycles; + + while (cvmx_get_cycle() < done) + ; /* Spin */ +} + +/** * Reads a chip global cycle counter. This counts CPU cycles since * chip reset. The counter is 64 bit. * This register does not exist on CN38XX pass 1 silicion |