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| author | 2010-10-16 14:22:38 -0700 | |
|---|---|---|
| committer | 2010-10-29 19:08:53 +0100 | |
| commit | 18d693b3598fdebdd5c65a613221793456a7ce45 (patch) | |
| tree | bdec7d15eb2ba774292358b2a617965ab3ff4530 /arch/mips/include/asm/processor.h | |
| parent | MIPS: Honor L2 bypass bit (diff) | |
| download | linux-dev-18d693b3598fdebdd5c65a613221793456a7ce45.tar.xz linux-dev-18d693b3598fdebdd5c65a613221793456a7ce45.zip | |
MIPS: Allow UserLocal on MIPS_R1 processors
Some MIPS32R1 processors implement UserLocal (RDHWR $29) to accelerate
programs that make extensive use of thread-local storage. Therefore,
setting up the HWRENA register should not depend on cpu_has_mips_r2.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/processor.h')
0 files changed, 0 insertions, 0 deletions
