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author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-11 09:19:02 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-11 09:19:02 -0700 |
commit | 835a1c092432b3293ba6c4dec45ee6869c6f61fd (patch) | |
tree | a48582e4e4de3a8924b700c5ccaae78cd299cd73 /arch/mips/include/asm/vr41xx/pci.h | |
parent | Merge branch 'for-linus' of git://git.alsa-project.org/alsa-kernel (diff) | |
parent | MIPS: RB532: provide GPIO_BUILTIN_NR and irq_to_gpio/gpio_to_irq (diff) | |
download | linux-dev-835a1c092432b3293ba6c4dec45ee6869c6f61fd.tar.xz linux-dev-835a1c092432b3293ba6c4dec45ee6869c6f61fd.zip |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (49 commits)
MIPS: RB532: provide GPIO_BUILTIN_NR and irq_to_gpio/gpio_to_irq
MIPS: Move ptrace prototypes to ptrace.h
MIPS: Ptrace support for HARDWARE_WATCHPOINTS
MIPS: Scheduler support for HARDWARE_WATCHPOINTS.
MIPS: Watch exception handling for HARDWARE_WATCHPOINTS.
MIPS: Probe watch registers and report configuration.
MIPS: Add HARDWARE_WATCHPOINTS definitions and support code.
MIPS: Add HARDWARE_WATCHPOINTS configure option.
MIPS: Replace use of <asm-generic/uaccess.h> with native implementations.
MIPS: TXx9: Add TX4939 ATA support (v2)
MIPS: Rewrite spinlocks to ticket locks.
MIPS: IP checksums: Optimize adjust of sum on buffers of odd alignment.
MIPS: IP checksums: Remove unncessary .set pseudos
MIPS: IP checksums: Remove unncessary folding of sum to 16 bit.
MIPS: Move headfiles to new location below arch/mips/include
MIPS: Alchemy: rename directory
MIPS: Optimize get_user and put_user for 64-bit
MIPS: TXx9: Implement prom_free_prom_memory
MIPS: TXx9: Add RBTX4939 board support
MIPS: TXx9: Add TX4939 SoC support
...
Diffstat (limited to 'arch/mips/include/asm/vr41xx/pci.h')
-rw-r--r-- | arch/mips/include/asm/vr41xx/pci.h | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/arch/mips/include/asm/vr41xx/pci.h b/arch/mips/include/asm/vr41xx/pci.h new file mode 100644 index 000000000000..6fc01ce19777 --- /dev/null +++ b/arch/mips/include/asm/vr41xx/pci.h @@ -0,0 +1,90 @@ +/* + * Include file for NEC VR4100 series PCI Control Unit. + * + * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __NEC_VR41XX_PCI_H +#define __NEC_VR41XX_PCI_H + +#define PCI_MASTER_ADDRESS_MASK 0x7fffffffU + +struct pci_master_address_conversion { + uint32_t bus_base_address; + uint32_t address_mask; + uint32_t pci_base_address; +}; + +struct pci_target_address_conversion { + uint32_t address_mask; + uint32_t bus_base_address; +}; + +typedef enum { + CANNOT_LOCK_FROM_DEVICE, + CAN_LOCK_FROM_DEVICE, +} pci_exclusive_access_t; + +struct pci_mailbox_address { + uint32_t base_address; +}; + +struct pci_target_address_window { + uint32_t base_address; +}; + +typedef enum { + PCI_ARBITRATION_MODE_FAIR, + PCI_ARBITRATION_MODE_ALTERNATE_0, + PCI_ARBITRATION_MODE_ALTERNATE_B, +} pci_arbiter_priority_control_t; + +typedef enum { + PCI_TAKE_AWAY_GNT_DISABLE, + PCI_TAKE_AWAY_GNT_ENABLE, +} pci_take_away_gnt_mode_t; + +struct pci_controller_unit_setup { + struct pci_master_address_conversion *master_memory1; + struct pci_master_address_conversion *master_memory2; + + struct pci_target_address_conversion *target_memory1; + struct pci_target_address_conversion *target_memory2; + + struct pci_master_address_conversion *master_io; + + pci_exclusive_access_t exclusive_access; + + uint32_t pci_clock_max; + uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */ + + struct pci_mailbox_address *mailbox; + struct pci_target_address_window *target_window1; + struct pci_target_address_window *target_window2; + + uint8_t master_latency_timer; + uint8_t retry_limit; + + pci_arbiter_priority_control_t arbiter_priority_control; + pci_take_away_gnt_mode_t take_away_gnt_mode; + + struct resource *mem_resource; + struct resource *io_resource; +}; + +extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup); + +#endif /* __NEC_VR41XX_PCI_H */ |