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| author |   Thomas Gleixner <tglx@linutronix.de> | 2013-08-21 14:44:54 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2013-08-21 14:44:54 +0200 |
| commit | fac778a2b8d6ca953d440baeee72901c2dd5aad9 (patch) | |
| tree | c43d780b5ff8819f4353b16c99601c5ceeeacad7 /arch/mips/kernel/smp-mt.c | |
| parent | ARM: clocksource: Add support for MOXA ART SoCs (diff) | |
| parent | proc: return on proc_readdir error (diff) | |
| download | linux-dev-fac778a2b8d6ca953d440baeee72901c2dd5aad9.tar.xz linux-dev-fac778a2b8d6ca953d440baeee72901c2dd5aad9.zip | |
Merge branch 'linus' into timers/core
Reason: Get upstream changes on which new patches depend on.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mips/kernel/smp-mt.c')
| -rw-r--r-- | arch/mips/kernel/smp-mt.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 3e5164c11cac..57a3f7a2b370 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c @@ -149,7 +149,7 @@ static void vsmp_send_ipi_mask(const struct cpumask *mask, unsigned int action) vsmp_send_ipi_single(i, action); } -static void __cpuinit vsmp_init_secondary(void) +static void vsmp_init_secondary(void) { #ifdef CONFIG_IRQ_GIC /* This is Malta specific: IPI,performance and timer interrupts */ @@ -162,7 +162,7 @@ static void __cpuinit vsmp_init_secondary(void) STATUSF_IP6 | STATUSF_IP7); } -static void __cpuinit vsmp_smp_finish(void) +static void vsmp_smp_finish(void) { /* CDFIXME: remove this? */ write_c0_compare(read_c0_count() + (8* mips_hpt_frequency/HZ)); @@ -188,7 +188,7 @@ static void vsmp_cpus_done(void) * (unsigned long)idle->thread_info the gp * assumes a 1:1 mapping of TC => VPE */ -static void __cpuinit vsmp_boot_secondary(int cpu, struct task_struct *idle) +static void vsmp_boot_secondary(int cpu, struct task_struct *idle) { struct thread_info *gp = task_thread_info(idle); dvpe(); |