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authorSteven J. Hill <sjhill@mips.com>2012-12-07 03:51:35 +0000
committerJohn Crispin <blogic@openwrt.org>2013-02-17 00:15:23 +0100
commitf8fa4811dbb264aef13f982e963389fd828b1ac0 (patch)
treeed1c9d2d9818671ca78feab63872d10b611ab953 /arch/mips/kernel
parentMIPS: Clean-ups for MIPS Technologies Inc. generic header file. (diff)
downloadlinux-dev-f8fa4811dbb264aef13f982e963389fd828b1ac0.tar.xz
linux-dev-f8fa4811dbb264aef13f982e963389fd828b1ac0.zip
MIPS: Add support for the M14KEc core.
Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4682/ Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cpu-probe.c7
-rw-r--r--arch/mips/kernel/proc.c1
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 9f31334ed1de..ba169022fe1d 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -201,6 +201,7 @@ void __init check_wait(void)
break;
case CPU_M14KC:
+ case CPU_M14KEC:
case CPU_24K:
case CPU_34K:
case CPU_1004K:
@@ -439,6 +440,8 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
c->ases |= MIPS_ASE_MIPSMT;
if (config3 & MIPS_CONF3_ULRI)
c->options |= MIPS_CPU_ULRI;
+ if (config3 & MIPS_CONF3_ISA)
+ c->options |= MIPS_CPU_MICROMIPS;
return config3 & MIPS_CONF_M;
}
@@ -861,6 +864,10 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
c->cputype = CPU_M14KC;
__cpu_name[cpu] = "MIPS M14Kc";
break;
+ case PRID_IMP_M14KEC:
+ c->cputype = CPU_M14KEC;
+ __cpu_name[cpu] = "MIPS M14KEc";
+ break;
case PRID_IMP_1004K:
c->cputype = CPU_1004K;
__cpu_name[cpu] = "MIPS 1004Kc";
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 07dff54f2ce8..239ae03f3330 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -73,6 +73,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
if (cpu_has_dsp) seq_printf(m, "%s", " dsp");
if (cpu_has_dsp2) seq_printf(m, "%s", " dsp2");
if (cpu_has_mipsmt) seq_printf(m, "%s", " mt");
+ if (cpu_has_mmips) seq_printf(m, "%s", " micromips");
seq_printf(m, "\n");
seq_printf(m, "shadow register sets\t: %d\n",