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authorJames Hogan <james.hogan@imgtec.com>2016-07-04 19:35:14 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2016-07-05 16:09:18 +0200
commit8eeab81c3d55ba41ae68888b13a1a34893104e12 (patch)
tree4f9058b4ae5e03b565e20f8896c030de32007663 /arch/mips/kvm
parentMIPS: KVM: Recognise r6 CACHE encoding (diff)
downloadlinux-dev-8eeab81c3d55ba41ae68888b13a1a34893104e12.tar.xz
linux-dev-8eeab81c3d55ba41ae68888b13a1a34893104e12.zip
MIPS: KVM: Decode RDHWR more strictly
When KVM emulates the RDHWR instruction, decode the instruction more strictly. The rs field (bits 25:21) should be zero, as should bits 10:9. Bits 8:6 is the register select field in MIPSr6, so we aren't strict about those bits (no other operations should use that encoding space). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim KrÄmář <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/mips/kvm')
-rw-r--r--arch/mips/kvm/emulate.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c
index 62e6a7b313ae..be18dfe9ecaa 100644
--- a/arch/mips/kvm/emulate.c
+++ b/arch/mips/kvm/emulate.c
@@ -2357,7 +2357,9 @@ enum emulation_result kvm_mips_handle_ri(u32 cause, u32 *opc,
}
if (inst.r_format.opcode == spec3_op &&
- inst.r_format.func == rdhwr_op) {
+ inst.r_format.func == rdhwr_op &&
+ inst.r_format.rs == 0 &&
+ (inst.r_format.re >> 3) == 0) {
int usermode = !KVM_GUEST_KERNEL_MODE(vcpu);
int rd = inst.r_format.rd;
int rt = inst.r_format.rt;