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authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-19 19:07:12 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-19 19:07:12 -0700
commit25f42b6af09e34c3f92107b36b5aa6edc2fdba2f (patch)
treee0977d906193eadeafebc442775491b844be79d5 /arch/mips/math-emu/cp1emu.c
parentMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband (diff)
parent[MIPS] Make timer interrupt frequency configurable from kconfig. (diff)
downloadlinux-dev-25f42b6af09e34c3f92107b36b5aa6edc2fdba2f.tar.xz
linux-dev-25f42b6af09e34c3f92107b36b5aa6edc2fdba2f.zip
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (51 commits) [MIPS] Make timer interrupt frequency configurable from kconfig. [MIPS] Correct HAL2 Kconfig description [MIPS] Fix R4K cache macro names [MIPS] Add Missing R4K Cache Macros to IP27 & IP32 [MIPS] Support for the RM9000-based Basler eXcite smart camera platform. [MIPS] Support for the R5500-based NEC EMMA2RH Mark-eins board [MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors. [MIPS] SN: include asm/sn/types.h for nasid_t. [MIPS] Random fixes for sb1250 [MIPS] Fix bcm1480 compile [MIPS] Remove support for NEC DDB5476. [MIPS] Remove support for NEC DDB5074. [MIPS] Cleanup memory managment initialization. [MIPS] SN: Declare bridge_pci_ops. [MIPS] Remove unused function alloc_pci_controller. [MIPS] IP27: Extract pci_ops into separate file. [MIPS] IP27: Use symbolic constants instead of magic numbers. [MIPS] vr41xx: remove unnecessay items from vr41xx/Kconfig. [MIPS] IP27: Cleanup N/M mode configuration. [MIPS] IP27: Throw away old unused hacks. ...
Diffstat (limited to 'arch/mips/math-emu/cp1emu.c')
-rw-r--r--arch/mips/math-emu/cp1emu.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index aa5818a0d884..3f0d5d26d506 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -60,15 +60,15 @@
/* Function which emulates a floating point instruction. */
-static int fpu_emu(struct pt_regs *, struct mips_fpu_soft_struct *,
+static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
mips_instruction);
#if __mips >= 4 && __mips != 32
static int fpux_emu(struct pt_regs *,
- struct mips_fpu_soft_struct *, mips_instruction);
+ struct mips_fpu_struct *, mips_instruction);
#endif
-/* Further private data for which no space exists in mips_fpu_soft_struct */
+/* Further private data for which no space exists in mips_fpu_struct */
struct mips_fpu_emulator_stats fpuemustats;
@@ -203,7 +203,7 @@ static int isBranchInstr(mips_instruction * i)
* Two instructions if the instruction is in a branch delay slot.
*/
-static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
+static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
{
mips_instruction ir;
void * emulpc, *contpc;
@@ -595,7 +595,7 @@ DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub,);
DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
-static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
+static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
mips_instruction ir)
{
unsigned rcsr = 0; /* resulting csr */
@@ -759,7 +759,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
/*
* Emulate a single COP1 arithmetic instruction.
*/
-static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
+static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
mips_instruction ir)
{
int rfmt; /* resulting format */
@@ -1233,8 +1233,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
return 0;
}
-int fpu_emulator_cop1Handler(struct pt_regs *xcp,
- struct mips_fpu_soft_struct *ctx)
+int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
{
unsigned long oldepc, prevepc;
mips_instruction insn;