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| author |   Maciej W. Rozycki <macro@linux-mips.org> | 2015-04-03 23:25:34 +0100 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2015-04-08 01:09:31 +0200 |
| commit | d5afa7e905544a3d9e2bb29d9cafebc8e544c978 (patch) | |
| tree | 7a3c2f068bff4f628db3a1c9d6f31bf86ebe9011 /arch/mips/math-emu/dp_fsp.c | |
| parent | MIPS: math-emu: Don't pass qNaNs through quieting handlers (diff) | |
| download | linux-dev-d5afa7e905544a3d9e2bb29d9cafebc8e544c978.tar.xz linux-dev-d5afa7e905544a3d9e2bb29d9cafebc8e544c978.zip | |
MIPS: math-emu: Reinstate sNaN quieting handlers
Revert the changes made by commit fdffbafb [Lots of FPU bug fixes from
Kjeld Borch Egevang.] to `ieee754sp_nanxcpt' and `ieee754dp_nanxcpt'
sNaN quieting handlers and their callers so that sNaN processing is done
within the handlers againg. Pass the sNaN causing an IEEE 754 invalid
operation exception down to the relevant handler. Pass the sNaN in `fs'
where two sNaNs are supplied to a binary operation.
Set the Invalid Operation FCSR exception bits in the quieting handlers
rather than at their call sites throughout. Make the handlers exclusive
for sNaN processing.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9688/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/math-emu/dp_fsp.c')
| -rw-r--r-- | arch/mips/math-emu/dp_fsp.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/math-emu/dp_fsp.c b/arch/mips/math-emu/dp_fsp.c index af48d2a277a4..57d09ca5403a 100644 --- a/arch/mips/math-emu/dp_fsp.c +++ b/arch/mips/math-emu/dp_fsp.c @@ -40,8 +40,7 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x) switch (xc) { case IEEE754_CLASS_SNAN: - ieee754_setcx(IEEE754_INVALID_OPERATION); - return ieee754dp_nanxcpt(ieee754dp_indef()); + return ieee754dp_nanxcpt(ieee754dp_nan_fsp(xs, xm)); case IEEE754_CLASS_QNAN: return ieee754dp_nan_fsp(xs, xm); |