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| author |   Thomas Koeller <thomas.koeller@baslerweb.com> | 2008-02-11 23:42:12 +0100 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2008-02-19 17:01:31 +0000 |
| commit | c42d95d6c49ce9c678a9d10aeb3f526c850d66dc (patch) | |
| tree | 5151123b8b0f71703ce16343c4042819d8abb575 /arch/mips/mm/cache.c | |
| parent | [MIPS] Handle I-cache coherency in flush_cache_range() (diff) | |
| download | linux-dev-c42d95d6c49ce9c678a9d10aeb3f526c850d66dc.tar.xz linux-dev-c42d95d6c49ce9c678a9d10aeb3f526c850d66dc.zip | |
[MIPS] Fix broken rm7000/rm9000 interrupt handling
Properly acknowledge RM7K and RM9K interrupts. Before this, interrupts were
permanently masked after their first occurrence, making them non-functional.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/cache.c')
0 files changed, 0 insertions, 0 deletions