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| author |   David Daney <ddaney@caviumnetworks.com> | 2009-12-04 13:52:36 -0800 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:03 +0100 |
| commit | 325f8a0a31df567dbafafc48f8e60f3c1f101a46 (patch) | |
| tree | b36383f4d483ecc6d057cdd41ef50b6403e89b9c /arch/mips/mm/init.c | |
| parent | MIPS: Alchemy: irq: use runtime CPU type detection (diff) | |
| download | linux-dev-325f8a0a31df567dbafafc48f8e60f3c1f101a46.tar.xz linux-dev-325f8a0a31df567dbafafc48f8e60f3c1f101a46.zip | |
MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.
For 64-bit kernels with 64KB pages and two level page tables, there are
42 bits worth of virtual address space This is larger than the 40 bits of
virtual address space obtained with the default 4KB Page size and three
levels, so there are no draw backs for using two level tables with this
configuration.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/761/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/init.c')
| -rw-r--r-- | arch/mips/mm/init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 1651942f7feb..3c5b7de10af5 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -477,7 +477,7 @@ unsigned long pgd_current[NR_CPUS]; * will officially be retired. */ pgd_t swapper_pg_dir[_PTRS_PER_PGD] __page_aligned(_PGD_ORDER); -#ifdef CONFIG_64BIT +#ifndef __PAGETABLE_PMD_FOLDED pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER); #endif pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER); |