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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2022-02-18 11:04:39 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2022-02-22 09:35:49 +0100
commitb56d1cafefaa4550888bace142be404db36b96a1 (patch)
tree7eab945addbf343a45e714c8ea0a0478a5a0369c /arch/mips/mm/page.c
parentMIPS: Malta: Enable BLK_DEV_INITRD (diff)
downloadlinux-dev-b56d1cafefaa4550888bace142be404db36b96a1.tar.xz
linux-dev-b56d1cafefaa4550888bace142be404db36b96a1.zip
MIPS: remove asm/war.h
The major part for workaround handling has already moved to config options. This change replaces the remaining defines by already available config options and gets rid of war.h Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/mm/page.c')
-rw-r--r--arch/mips/mm/page.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index 504bc4047c4c..d3b4459d0fe8 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -25,7 +25,6 @@
#include <asm/mipsregs.h>
#include <asm/mmu_context.h>
#include <asm/cpu.h>
-#include <asm/war.h>
#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
#include <asm/sibyte/sb1250.h>
@@ -103,7 +102,9 @@ static int cache_line_size;
static inline void
pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off)
{
- if (cpu_has_64bit_gp_regs && DADDI_WAR && r4k_daddiu_bug()) {
+ if (cpu_has_64bit_gp_regs &&
+ IS_ENABLED(CONFIG_CPU_DADDI_WORKAROUNDS) &&
+ r4k_daddiu_bug()) {
if (off > 0x7fff) {
uasm_i_lui(buf, T9, uasm_rel_hi(off));
uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off));