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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 19:21:23 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 19:21:23 -0700
commitdd6d1844af33acb4edd0a40b1770d091a22c94be (patch)
treee6bd3549919773a13b770324a4dddb51b194b452 /arch/mips/mm/pg-r4k.c
parentMerge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6 (diff)
parent[MIPS] tlbex.c: Cleanup __init usage. (diff)
downloadlinux-dev-dd6d1844af33acb4edd0a40b1770d091a22c94be.tar.xz
linux-dev-dd6d1844af33acb4edd0a40b1770d091a22c94be.zip
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (80 commits) [MIPS] tlbex.c: Cleanup __init usage. [MIPS] WRPPMC serial support move to platform device [MIPS] R1: Fix hazard barriers to make kernels work on R2 also. [MIPS] VPE: reimplement ELF loader. [MIPS] cleanup WRPPMC include files [MIPS] Add BUG_ON assertion for attempt to run kernel on the wrong CPU type. [MIPS] SMP: Use ISO C struct initializer for local structs. [MIPS] SMP: Kill useless casts. [MIPS] Kill num_online_cpus() loops. [MIPS] SMP: Implement smp_call_function_mask(). [MIPS] Make facility to convert CPU types to strings generally available. [MIPS] Convert list of CPU types from #define to enum. [MIPS] Optimize get_unaligned / put_unaligned implementations. [MIPS] checkfiles: Fix "need space after that ','" errors. [MIPS] Fix "no space between function name and open parenthesis" warnings. [MIPS] Allow hardwiring of the CPU type to a single type for optimization. [MIPS] tlbex: Size optimize code by declaring a few functions inline. [MIPS] pg-r4k.c: Dump the generated code [MIPS] Cobalt: Remove cobalt_machine_power_off() [MIPS] Cobalt: Move reset port definition to arch/mips/cobalt/reset.c ...
Diffstat (limited to 'arch/mips/mm/pg-r4k.c')
-rw-r--r--arch/mips/mm/pg-r4k.c22
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index e47e9e9486bf..4f770ac885ce 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -347,13 +347,14 @@ void __init build_clear_page(void)
{
unsigned int loop_start;
unsigned long off;
+ int i;
epc = (unsigned int *) &clear_page_array;
instruction_pending = 0;
store_offset = 0;
if (cpu_has_prefetch) {
- switch (current_cpu_data.cputype) {
+ switch (current_cpu_type()) {
case CPU_TX49XX:
/* TX49 supports only Pref_Load */
pref_offset_clear = 0;
@@ -434,12 +435,22 @@ dest = label();
build_jr_ra();
BUG_ON(epc > clear_page_array + ARRAY_SIZE(clear_page_array));
+
+ pr_info("Synthesized clear page handler (%u instructions).\n",
+ (unsigned int)(epc - clear_page_array));
+
+ pr_debug("\t.set push\n");
+ pr_debug("\t.set noreorder\n");
+ for (i = 0; i < (epc - clear_page_array); i++)
+ pr_debug("\t.word 0x%08x\n", clear_page_array[i]);
+ pr_debug("\t.set pop\n");
}
void __init build_copy_page(void)
{
unsigned int loop_start;
unsigned long off;
+ int i;
epc = (unsigned int *) &copy_page_array;
store_offset = load_offset = 0;
@@ -515,4 +526,13 @@ dest = label();
build_jr_ra();
BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array));
+
+ pr_info("Synthesized copy page handler (%u instructions).\n",
+ (unsigned int)(epc - copy_page_array));
+
+ pr_debug("\t.set push\n");
+ pr_debug("\t.set noreorder\n");
+ for (i = 0; i < (epc - copy_page_array); i++)
+ pr_debug("\t.word 0x%08x\n", copy_page_array[i]);
+ pr_debug("\t.set pop\n");
}