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| author |   Mark Brown <broonie@kernel.org> | 2015-03-10 10:37:02 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-03-10 10:37:02 +0000 |
| commit | eb5bc2a213f96bd43b5f00a625acb0c669613645 (patch) | |
| tree | 6093a86c9e704ebfed54adb426ff3079a428da93 /arch/mips/mm/tlbex.c | |
| parent | ASoC: rt5670: Check sysclk source by private data (diff) | |
| parent | Linux 4.0-rc3 (diff) | |
| download | linux-dev-eb5bc2a213f96bd43b5f00a625acb0c669613645.tar.xz linux-dev-eb5bc2a213f96bd43b5f00a625acb0c669613645.zip | |
Merge tag 'v4.0-rc3' into asoc-rt5670
Linux 4.0-rc3
Conflicts:
sound/soc/codecs/rt5670.c
Diffstat (limited to 'arch/mips/mm/tlbex.c')
| -rw-r--r-- | arch/mips/mm/tlbex.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 3978a3d81366..d75ff73a2012 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -501,7 +501,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l, case tlb_indexed: tlbw = uasm_i_tlbwi; break; } - if (cpu_has_mips_r2) { + if (cpu_has_mips_r2_exec_hazard) { /* * The architecture spec says an ehb is required here, * but a number of cores do not have the hazard and @@ -514,6 +514,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l, case CPU_PROAPTIV: case CPU_P5600: case CPU_M5150: + case CPU_QEMU_GENERIC: break; default: @@ -1952,7 +1953,7 @@ static void build_r4000_tlb_load_handler(void) switch (current_cpu_type()) { default: - if (cpu_has_mips_r2) { + if (cpu_has_mips_r2_exec_hazard) { uasm_i_ehb(&p); case CPU_CAVIUM_OCTEON: @@ -2019,7 +2020,7 @@ static void build_r4000_tlb_load_handler(void) switch (current_cpu_type()) { default: - if (cpu_has_mips_r2) { + if (cpu_has_mips_r2_exec_hazard) { uasm_i_ehb(&p); case CPU_CAVIUM_OCTEON: |