diff options
| author |   Andrew Bresticker <abrestic@chromium.org> | 2014-09-18 14:47:14 -0700 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:44:53 +0100 |
| commit | a67b3cf1af7affcf3fc8ad775c90954aa887032c (patch) | |
| tree | 43ac34bb090e3a9d39561ca9b39522fd5a54dd3f /arch/mips/mti-sead3 | |
| parent | MIPS: smp-cps: Enable all hardware interrupts on secondary CPUs (diff) | |
| download | linux-dev-a67b3cf1af7affcf3fc8ad775c90954aa887032c.tar.xz linux-dev-a67b3cf1af7affcf3fc8ad775c90954aa887032c.zip | |
MIPS: Remove gic_{enable,disable}_interrupt()
Nothing calls gic_{enable,disable}_interrupt() any more.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7806/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-sead3')
| -rw-r--r-- | arch/mips/mti-sead3/sead3-int.c | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c index 6a560ac03def..9d5b5bd3a1d2 100644 --- a/arch/mips/mti-sead3/sead3-int.c +++ b/arch/mips/mti-sead3/sead3-int.c @@ -85,40 +85,6 @@ void __init arch_init_irq(void) ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); } -void gic_enable_interrupt(int irq_vec) -{ - unsigned int i, irq_source; - - /* enable all the interrupts associated with this vector */ - for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) { - irq_source = gic_shared_intr_map[irq_vec].intr_list[i]; - GIC_SET_INTR_MASK(irq_source); - } - /* enable all local interrupts associated with this vector */ - if (gic_shared_intr_map[irq_vec].local_intr_mask) { - GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0); - GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_SMASK), - gic_shared_intr_map[irq_vec].local_intr_mask); - } -} - -void gic_disable_interrupt(int irq_vec) -{ - unsigned int i, irq_source; - - /* disable all the interrupts associated with this vector */ - for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) { - irq_source = gic_shared_intr_map[irq_vec].intr_list[i]; - GIC_CLR_INTR_MASK(irq_source); - } - /* disable all local interrupts associated with this vector */ - if (gic_shared_intr_map[irq_vec].local_intr_mask) { - GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0); - GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_RMASK), - gic_shared_intr_map[irq_vec].local_intr_mask); - } -} - void gic_irq_ack(struct irq_data *d) { GIC_CLR_INTR_MASK(d->irq - gic_irq_base); |