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authorJayachandran C <jchandra@broadcom.com>2014-05-09 16:35:14 +0530
committerRalf Baechle <ralf@linux-mips.org>2014-05-30 16:47:56 +0200
commita3deecfaa36662ca2e2104be3c305236cf03efcc (patch)
tree64c90d95f734fc75ded54103e9c94ab23e35bc71 /arch/mips/netlogic/common/smpboot.S
parentMIPS: Netlogic: Use cpumask_scnprintf for wakeup_mask (diff)
downloadlinux-dev-a3deecfaa36662ca2e2104be3c305236cf03efcc.tar.xz
linux-dev-a3deecfaa36662ca2e2104be3c305236cf03efcc.zip
MIPS: Netlogic: Reduce size of reset code
Update thread wakeup function to use scratch registers for saving SP and RA. Move the register restore code needed for thread 0 to the calling function. This reduces the size of code copied to the reset vector. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6910/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/netlogic/common/smpboot.S')
-rw-r--r--arch/mips/netlogic/common/smpboot.S12
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/mips/netlogic/common/smpboot.S b/arch/mips/netlogic/common/smpboot.S
index 8597657c27fc..805355b0bd05 100644
--- a/arch/mips/netlogic/common/smpboot.S
+++ b/arch/mips/netlogic/common/smpboot.S
@@ -54,8 +54,9 @@
.set noat
.set arch=xlr /* for mfcr/mtcr, XLR is sufficient */
-FEXPORT(xlp_boot_core0_siblings) /* "Master" cpu starts from here */
- dmtc0 sp, $4, 2 /* SP saved in UserLocal */
+/* Called by the boot cpu to wake up its sibling threads */
+NESTED(xlp_boot_core0_siblings, PT_SIZE, sp)
+ /* CPU register contents lost when enabling threads, save them first */
SAVE_ALL
sync
/* find the location to which nlm_boot_siblings was relocated */
@@ -65,9 +66,12 @@ FEXPORT(xlp_boot_core0_siblings) /* "Master" cpu starts from here */
dsubu t2, t1
daddu t2, t0
/* call it */
- jr t2
+ jalr t2
nop
- /* not reached */
+ RESTORE_ALL
+ jr ra
+ nop
+END(xlp_boot_core0_siblings)
NESTED(nlm_boot_secondary_cpus, 16, sp)
/* Initialize CP0 Status */