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authorRalf Baechle <ralf@linux-mips.org>2007-10-11 23:46:15 +0100
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 23:46:15 +0100
commit10cc3529072d5415fb040018a8a99aa7a60190b6 (patch)
treefe07fb5112c9c34c2aecfac982155307bc168f07 /arch/mips/pci
parent[MIPS] tlbex: Size optimize code by declaring a few functions inline. (diff)
downloadlinux-dev-10cc3529072d5415fb040018a8a99aa7a60190b6.tar.xz
linux-dev-10cc3529072d5415fb040018a8a99aa7a60190b6.zip
[MIPS] Allow hardwiring of the CPU type to a single type for optimization.
This saves a few k on systems which only ever ship with a single CPU type. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
-rw-r--r--arch/mips/pci/pci-vr41xx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
index 9885fa403603..240df9e33813 100644
--- a/arch/mips/pci/pci-vr41xx.c
+++ b/arch/mips/pci/pci-vr41xx.c
@@ -228,7 +228,7 @@ static int __init vr41xx_pciu_init(void)
else
pciu_write(PCIEXACCREG, 0);
- if (current_cpu_data.cputype == CPU_VR4122)
+ if (current_cpu_type() == CPU_VR4122)
pciu_write(PCITRDYVREG, TRDYV(setup->wait_time_limit_from_irdy_to_trdy));
pciu_write(LATTIMEREG, MLTIM(setup->master_latency_timer));