diff options
| author |   Wang Qing <wangqing@vivo.com> | 2021-03-30 15:02:44 +0800 |
|---|---|---|
| committer |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2021-03-30 15:06:37 +0200 |
| commit | f681c11bae9acde257a3c48e6b07a0d4dc50e98d (patch) | |
| tree | 8d7418d1d4469650cfad6f1b426e9f30d395b69c /arch/mips/sgi-ip27/TODO | |
| parent | MIPS: Loongson64: enable CONFIG_USB_SERIAL_PL2303 (diff) | |
| download | linux-dev-f681c11bae9acde257a3c48e6b07a0d4dc50e98d.tar.xz linux-dev-f681c11bae9acde257a3c48e6b07a0d4dc50e98d.zip | |
mips/sgi-ip27: Delete obsolete TODO file
The TODO file here has not been updated for 15 years, and the function
development described in the file have been implemented or abandoned.
Its existence will mislead developers seeking to view outdated information.
Signed-off-by: Wang Qing <wangqing@vivo.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/sgi-ip27/TODO')
| -rw-r--r-- | arch/mips/sgi-ip27/TODO | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/mips/sgi-ip27/TODO b/arch/mips/sgi-ip27/TODO deleted file mode 100644 index 160857ff1483..000000000000 --- a/arch/mips/sgi-ip27/TODO +++ /dev/null @@ -1,19 +0,0 @@ -1. Need to figure out why PCI writes to the IOC3 hang, and if it is okay -not to write to the IOC3 ever. -2. Need to figure out RRB allocation in bridge_startup(). -3. Need to figure out why address swaizzling is needed in inw/outw for -Qlogic scsi controllers. -4. Need to integrate ip27-klconfig.c:find_lboard and -ip27-init.c:find_lbaord_real. DONE -5. Is it okay to set calias space on all nodes as 0, instead of 8k as -in irix? -6. Investigate why things do not work without the setup_test() call -being invoked on all nodes in ip27-memory.c. -8. Too many do_page_faults invoked - investigate. -9. start_thread must turn off UX64 ... and define tlb_refill_debug. -10. Need a bad pmd table, bad pte table. __bad_pmd_table/__bad_pagetable -does not agree with pgd_bad/pmd_bad. -11. All intrs (ip27_do_irq handlers) are targeted at cpu A on the node. -This might need to change later. Only the timer intr is set up to be -received on both Cpu A and B. (ip27_do_irq()/bridge_startup()) -13. Cache flushing (specially the SMP version) has to be investigated. |