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authorAndrew Isaacson <adi@broadcom.com>2005-10-19 23:57:40 -0700
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:32:48 +0100
commita4b5bd9abcf5b0586de68722ff8e9b91020279bf (patch)
treefe0f4014bf5e92d72d4e15d90cf3eab3713ceee5 /arch/mips/sibyte
parentSupport for BigSur board. (diff)
downloadlinux-dev-a4b5bd9abcf5b0586de68722ff8e9b91020279bf.tar.xz
linux-dev-a4b5bd9abcf5b0586de68722ff8e9b91020279bf.zip
SB1 cache exception handling.
Expand SB1 cache error handling by adding SB1_CEX_ALWAYS_FATAL and SB1_CEX_STALL, allowing configurable behavior on cache errors. Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r--arch/mips/sibyte/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index 6a5a08f5e212..de46f62ac462 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -102,6 +102,14 @@ config SIMULATION
Build a kernel suitable for running under the GDB simulator.
Primarily adjusts the kernel's notion of time.
+config CONFIG_SB1_CEX_ALWAYS_FATAL
+ bool "All cache exceptions considered fatal (no recovery attempted)"
+ depends on SIBYTE_SB1xxx_SOC
+
+config CONFIG_SB1_CERR_STALL
+ bool "Stall (rather than panic) on fatal cache error"
+ depends on SIBYTE_SB1xxx_SOC
+
config SIBYTE_CFE
bool "Booting from CFE"
depends on SIBYTE_SB1xxx_SOC