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authorLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>2014-11-13 13:39:39 +0000
committerMarkos Chandras <markos.chandras@imgtec.com>2015-02-17 15:37:25 +0000
commit54dac95083828e56ed1dee846c2e631f72361f86 (patch)
treec5826df0a7627f6a6f4f7a19a8fa001b1c003ce2 /arch/mips
parentMIPS: kernel: cpu-bugs64: Do not check R6 cores for existing 64-bit bugs (diff)
downloadlinux-dev-54dac95083828e56ed1dee846c2e631f72361f86.tar.xz
linux-dev-54dac95083828e56ed1dee846c2e631f72361f86.zip
MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler
Just like MIPS R2, in MIPS R6 it is possible to determine if a timer interrupt has happened or not. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/cevt-r4k.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 28bfdf2c59a5..82bd2b278a24 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -39,7 +39,7 @@ int cp0_timer_irq_installed;
irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
{
- const int r2 = cpu_has_mips_r2;
+ const int r2 = cpu_has_mips_r2_r6;
struct clock_event_device *cd;
int cpu = smp_processor_id();