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| author |   Kurt Martin <kurt@mips.com> | 2009-07-08 19:22:35 -0700 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2009-08-03 17:52:42 +0100 |
| commit | d8e5f9fe5dab0e07985f2456cb6cc57788f53131 (patch) | |
| tree | d32eae0145e9a8031818eaff863dc4c3f506b6c9 /arch/mips | |
| parent | [PATCH] MIPS: SMTC: Fix compile error (diff) | |
| download | linux-dev-d8e5f9fe5dab0e07985f2456cb6cc57788f53131.tar.xz linux-dev-d8e5f9fe5dab0e07985f2456cb6cc57788f53131.zip | |
MIPS: SMTC: Move cross VPE writes to after a TC is assigned to VPE.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Raghu Gandham <raghu@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/kernel/smtc.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 8a0626cbb108..c16bb6d6c25c 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -465,11 +465,8 @@ void smtc_prepare_cpus(int cpus) smtc_configure_tlb(); for (tc = 0, vpe = 0 ; (vpe < nvpe) && (tc < ntc) ; vpe++) { - /* - * Set the MVP bits. - */ - settc(tc); - write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_MVP); + if (tcpervpe[vpe] == 0) + continue; if (vpe != 0) printk(", "); printk("VPE %d: TC", vpe); @@ -488,6 +485,12 @@ void smtc_prepare_cpus(int cpus) } if (vpe != 0) { /* + * Allow this VPE to control others. + */ + write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | + VPECONF0_MVP); + + /* * Clear any stale software interrupts from VPE's Cause */ write_vpe_c0_cause(0); |