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| author |   James Hogan <james.hogan@imgtec.com> | 2014-01-17 12:01:30 +0000 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2014-01-24 22:39:56 +0100 |
| commit | e36059e508c209703c3a60ef716a5b524fb0a832 (patch) | |
| tree | 9076a00689bc92cfaf360532bb66bb5a555d80c9 /arch/mips | |
| parent | mips/ide: flush dcache also if icache does not snoop dcache (diff) | |
| download | linux-dev-e36059e508c209703c3a60ef716a5b524fb0a832.tar.xz linux-dev-e36059e508c209703c3a60ef716a5b524fb0a832.zip | |
MIPS: KVM: use common EHINV aware UNIQUE_ENTRYHI
When KVM is enabled and TLB invalidation is supported,
kvm_mips_flush_host_tlb() can cause a machine check exception due to
multiple matching TLB entries. This can occur on shutdown even when KVM
hasn't been actively used.
Commit adb78de9eae8 (MIPS: mm: Move UNIQUE_ENTRYHI macro to a header
file) created a common UNIQUE_ENTRYHI in asm/tlb.h but it didn't update
the copy of UNIQUE_ENTRYHI in kvm_tlb.c to use it.
Commit 36b175451399 (MIPS: tlb: Set the EHINV bit for TLBINVF cores when
invalidating the TLB) later added TLB invalidation (EHINV) support to
the common UNIQUE_ENTRYHI.
Therefore make kvm_tlb.c use the EHINV aware UNIQUE_ENTRYHI
implementation in asm/tlb.h too.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: Gleb Natapov <gleb@redhat.com>
Cc: kvm@vger.kernel.org
Cc: Sanjay Lal <sanjayl@kymasys.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6383/
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/kvm/kvm_tlb.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/mips/kvm/kvm_tlb.c b/arch/mips/kvm/kvm_tlb.c index c777dd36d4a8..52083ea7fddd 100644 --- a/arch/mips/kvm/kvm_tlb.c +++ b/arch/mips/kvm/kvm_tlb.c @@ -25,6 +25,7 @@ #include <asm/mmu_context.h> #include <asm/pgtable.h> #include <asm/cacheflush.h> +#include <asm/tlb.h> #undef CONFIG_MIPS_MT #include <asm/r4kcache.h> @@ -35,9 +36,6 @@ #define PRIx64 "llx" -/* Use VZ EntryHi.EHINV to invalidate TLB entries */ -#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) - atomic_t kvm_mips_instance; EXPORT_SYMBOL(kvm_mips_instance); |