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| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-10 10:13:37 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-10 10:13:37 -0700 |
| commit | d6075262969321bcb5d795de25595fc2a141ac02 (patch) | |
| tree | 8b9021abdbec609fb44a265af7362c4fbed30b37 /arch/nios2/platform | |
| parent | Merge tag 'for-5.1/dm-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm (diff) | |
| parent | nios2: Fix update_mmu_cache preload the TLB with the new PTE (diff) | |
| download | linux-dev-d6075262969321bcb5d795de25595fc2a141ac02.tar.xz linux-dev-d6075262969321bcb5d795de25595fc2a141ac02.zip | |
Merge tag 'nios2-v5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2
Pull nios2 updates from Ley Foon Tan:
"Most of updates are MMU related"
* tag 'nios2-v5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2:
nios2: Fix update_mmu_cache preload the TLB with the new PTE
nios2: update_mmu_cache preload the TLB with the new PTE
nios2: User address TLB flush break after finding the matching entry
nios2: flush_tlb_all use TLBMISC way auto-increment feature
nios2: improve readability of tlb functions
nios2: flush_tlb_mm flush only the pid
nios2: flush_tlb_pid can just restore TLBMISC once
nios2: TLBMISC writes do not require PID bits to be set
nios2: Use an invalid TLB entry address helper function
nios2: pte_clear does not need to flush TLB
nios2: flush_tlb_page use PID based flush
nios2: update_mmu_cache clear the old entry from the TLB
nios2: remove redundant 'default n' from Kconfig-s
nios2: ksyms: Add missing symbol exports
Diffstat (limited to 'arch/nios2/platform')
| -rw-r--r-- | arch/nios2/platform/Kconfig.platform | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/nios2/platform/Kconfig.platform b/arch/nios2/platform/Kconfig.platform index 74c1aaf588b8..c72074f8bdd9 100644 --- a/arch/nios2/platform/Kconfig.platform +++ b/arch/nios2/platform/Kconfig.platform @@ -17,7 +17,6 @@ comment "Device tree" config NIOS2_DTB_AT_PHYS_ADDR bool "DTB at physical address" - default n help When enabled you can select a physical address to load the dtb from. Normally this address is passed by a bootloader such as u-boot but @@ -37,7 +36,6 @@ config NIOS2_DTB_PHYS_ADDR config NIOS2_DTB_SOURCE_BOOL bool "Compile and link device tree into kernel image" - default n help This allows you to specify a dts (device tree source) file which will be compiled and linked into the kernel image. @@ -62,21 +60,18 @@ config NIOS2_ARCH_REVISION config NIOS2_HW_MUL_SUPPORT bool "Enable MUL instruction" - default n help Set to true if you configured the Nios II to include the MUL instruction. This will enable the -mhw-mul compiler flag. config NIOS2_HW_MULX_SUPPORT bool "Enable MULX instruction" - default n help Set to true if you configured the Nios II to include the MULX instruction. Enables the -mhw-mulx compiler flag. config NIOS2_HW_DIV_SUPPORT bool "Enable DIV instruction" - default n help Set to true if you configured the Nios II to include the DIV instruction. Enables the -mhw-div compiler flag. @@ -84,7 +79,6 @@ config NIOS2_HW_DIV_SUPPORT config NIOS2_BMX_SUPPORT bool "Enable BMX instructions" depends on NIOS2_ARCH_REVISION = 2 - default n help Set to true if you configured the Nios II R2 to include the BMX Bit Manipulation Extension instructions. Enables @@ -93,7 +87,6 @@ config NIOS2_BMX_SUPPORT config NIOS2_CDX_SUPPORT bool "Enable CDX instructions" depends on NIOS2_ARCH_REVISION = 2 - default n help Set to true if you configured the Nios II R2 to include the CDX Bit Manipulation Extension instructions. Enables @@ -101,13 +94,11 @@ config NIOS2_CDX_SUPPORT config NIOS2_FPU_SUPPORT bool "Custom floating point instr support" - default n help Enables the -mcustom-fpu-cfg=60-1 compiler flag. config NIOS2_CI_SWAB_SUPPORT bool "Byteswap custom instruction" - default n help Use the byteswap (endian converter) Nios II custom instruction provided by Altera and which can be enabled in QSYS builder. This accelerates |