diff options
| author |   Xuelin Shi <b29237@freescale.com> | 2012-11-21 17:01:20 +0800 |
|---|---|---|
| committer |   Kumar Gala <galak@kernel.crashing.org> | 2012-11-25 07:19:51 -0600 |
| commit | 1723d90915d4689fa2e8cd4151d45ea38c96cb99 (patch) | |
| tree | 05e6b66c430b9a28e982193e984c9eb24a51ea45 /arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi | |
| parent | powerpc/iommu/fsl: Add PAMU bypass enable register to ccsr_guts struct (diff) | |
| download | linux-dev-1723d90915d4689fa2e8cd4151d45ea38c96cb99.tar.xz linux-dev-1723d90915d4689fa2e8cd4151d45ea38c96cb99.zip | |
powerpc/dma/raidengine: add raidengine device
The RaidEngine is a new Freescale hardware that used for parity
computation offloading in RAID5/6.
This patch adds the device node in device tree and related binding
documentation.
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Naveen Burmi <naveenburmi@freescale.com>
Signed-off-by: Xuelin Shi <b29237@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi')
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi index 0a198b0a77e5..8df47fc45ab5 100644 --- a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi +++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi @@ -73,6 +73,12 @@ rtic_c = &rtic_c; rtic_d = &rtic_d; sec_mon = &sec_mon; + + raideng = &raideng; + raideng_jr0 = &raideng_jr0; + raideng_jr1 = &raideng_jr1; + raideng_jr2 = &raideng_jr2; + raideng_jr3 = &raideng_jr3; }; cpus { |