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authorHongtao Jia <hongtao.jia@freescale.com>2015-09-18 12:00:24 +0800
committerScott Wood <scottwood@freescale.com>2015-10-17 00:36:34 -0500
commitdc37374b9c83382b91f3804845ae593bedc2d13a (patch)
tree0e3c2002394f94f39b1267092ac212e1e59366db /arch/powerpc/boot/dts/t4240qds.dts
parentpowerpc/b4860: Removed LIODN register from sRIO node (diff)
downloadlinux-dev-dc37374b9c83382b91f3804845ae593bedc2d13a.tar.xz
linux-dev-dc37374b9c83382b91f3804845ae593bedc2d13a.zip
powerpc/fsl: Move Freescale device tree files into fsl folder
It makes no sense that some Freescale device tree files are in fsl directory while some others not. This patch move Freescale device tree files into fsl folder. To do that the following two steps are made: - Move Freescale device tree files into fsl folder. - Update the include path in these files from "fsl/*.dtsi" to "*.dtsi". Please add "fsl/" prefix when you make dtb using Makefile. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> [scottwood: fixed cuImage rule] Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts/t4240qds.dts')
-rw-r--r--arch/powerpc/boot/dts/t4240qds.dts310
1 files changed, 0 insertions, 310 deletions
diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/t4240qds.dts
deleted file mode 100644
index 93722da10e16..000000000000
--- a/arch/powerpc/boot/dts/t4240qds.dts
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * T4240QDS Device Tree Source
- *
- * Copyright 2012 - 2014 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/include/ "fsl/t4240si-pre.dtsi"
-
-/ {
- model = "fsl,T4240QDS";
- compatible = "fsl,T4240QDS";
- #address-cells = <2>;
- #size-cells = <2>;
- interrupt-parent = <&mpic>;
-
- ifc: localbus@ffe124000 {
- reg = <0xf 0xfe124000 0 0x2000>;
- ranges = <0 0 0xf 0xe8000000 0x08000000
- 2 0 0xf 0xff800000 0x00010000
- 3 0 0xf 0xffdf0000 0x00008000>;
-
- nor@0,0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "cfi-flash";
- reg = <0x0 0x0 0x8000000>;
-
- bank-width = <2>;
- device-width = <1>;
- };
-
- nand@2,0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,ifc-nand";
- reg = <0x2 0x0 0x10000>;
-
- partition@0 {
- /* This location must not be altered */
- /* 1MB for u-boot Bootloader Image */
- reg = <0x0 0x00100000>;
- label = "NAND U-Boot Image";
- read-only;
- };
-
- partition@100000 {
- /* 1MB for DTB Image */
- reg = <0x00100000 0x00100000>;
- label = "NAND DTB Image";
- };
-
- partition@200000 {
- /* 10MB for Linux Kernel Image */
- reg = <0x00200000 0x00A00000>;
- label = "NAND Linux Kernel Image";
- };
-
- partition@C00000 {
- /* 500MB for Root file System Image */
- reg = <0x00c00000 0x1F400000>;
- label = "NAND RFS Image";
- };
- };
-
- board-control@3,0 {
- compatible = "fsl,t4240qds-fpga", "fsl,fpga-qixis";
- reg = <3 0 0x300>;
- };
- };
-
- memory {
- device_type = "memory";
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- bman_fbpr: bman-fbpr {
- size = <0 0x1000000>;
- alignment = <0 0x1000000>;
- };
- qman_fqd: qman-fqd {
- size = <0 0x400000>;
- alignment = <0 0x400000>;
- };
- qman_pfdr: qman-pfdr {
- size = <0 0x2000000>;
- alignment = <0 0x2000000>;
- };
- };
-
- dcsr: dcsr@f00000000 {
- ranges = <0x00000000 0xf 0x00000000 0x01072000>;
- };
-
- bportals: bman-portals@ff4000000 {
- ranges = <0x0 0xf 0xf4000000 0x2000000>;
- };
-
- qportals: qman-portals@ff6000000 {
- ranges = <0x0 0xf 0xf6000000 0x2000000>;
- };
-
- soc: soc@ffe000000 {
- ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
- reg = <0xf 0xfe000000 0 0x00001000>;
- spi@110000 {
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "sst,sst25wf040";
- reg = <0>;
- spi-max-frequency = <40000000>; /* input clock */
- };
- };
-
- i2c@118000 {
- mux@77 {
- compatible = "nxp,pca9547";
- reg = <0x77>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- i2c@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- eeprom@51 {
- compatible = "at24,24c256";
- reg = <0x51>;
- };
- eeprom@52 {
- compatible = "at24,24c256";
- reg = <0x52>;
- };
- eeprom@53 {
- compatible = "at24,24c256";
- reg = <0x53>;
- };
- eeprom@54 {
- compatible = "at24,24c256";
- reg = <0x54>;
- };
- eeprom@55 {
- compatible = "at24,24c256";
- reg = <0x55>;
- };
- eeprom@56 {
- compatible = "at24,24c256";
- reg = <0x56>;
- };
- rtc@68 {
- compatible = "dallas,ds3232";
- reg = <0x68>;
- interrupts = <0x1 0x1 0 0>;
- };
- };
-
- i2c@2 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x2>;
-
- ina220@40 {
- compatible = "ti,ina220";
- reg = <0x40>;
- shunt-resistor = <1000>;
- };
-
- ina220@41 {
- compatible = "ti,ina220";
- reg = <0x41>;
- shunt-resistor = <1000>;
- };
-
- ina220@44 {
- compatible = "ti,ina220";
- reg = <0x44>;
- shunt-resistor = <1000>;
- };
-
- ina220@45 {
- compatible = "ti,ina220";
- reg = <0x45>;
- shunt-resistor = <1000>;
- };
-
- ina220@46 {
- compatible = "ti,ina220";
- reg = <0x46>;
- shunt-resistor = <1000>;
- };
-
- ina220@47 {
- compatible = "ti,ina220";
- reg = <0x47>;
- shunt-resistor = <1000>;
- };
- };
- };
- };
-
- sdhc@114000 {
- voltage-ranges = <1800 1800 3300 3300>;
- };
- };
-
- pci0: pcie@ffe240000 {
- reg = <0xf 0xfe240000 0 0x10000>;
- ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
- 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
- pcie@0 {
- ranges = <0x02000000 0 0xe0000000
- 0x02000000 0 0xe0000000
- 0 0x20000000
-
- 0x01000000 0 0x00000000
- 0x01000000 0 0x00000000
- 0 0x00010000>;
- };
- };
-
- pci1: pcie@ffe250000 {
- reg = <0xf 0xfe250000 0 0x10000>;
- ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
- 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
- pcie@0 {
- ranges = <0x02000000 0 0xe0000000
- 0x02000000 0 0xe0000000
- 0 0x20000000
-
- 0x01000000 0 0x00000000
- 0x01000000 0 0x00000000
- 0 0x00010000>;
- };
- };
-
- pci2: pcie@ffe260000 {
- reg = <0xf 0xfe260000 0 0x1000>;
- ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
- 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
- pcie@0 {
- ranges = <0x02000000 0 0xe0000000
- 0x02000000 0 0xe0000000
- 0 0x20000000
-
- 0x01000000 0 0x00000000
- 0x01000000 0 0x00000000
- 0 0x00010000>;
- };
- };
-
- pci3: pcie@ffe270000 {
- reg = <0xf 0xfe270000 0 0x10000>;
- ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
- 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
- pcie@0 {
- ranges = <0x02000000 0 0xe0000000
- 0x02000000 0 0xe0000000
- 0 0x20000000
-
- 0x01000000 0 0x00000000
- 0x01000000 0 0x00000000
- 0 0x00010000>;
- };
- };
- rio: rapidio@ffe0c0000 {
- reg = <0xf 0xfe0c0000 0 0x11000>;
-
- port1 {
- ranges = <0 0 0xc 0x20000000 0 0x10000000>;
- };
- port2 {
- ranges = <0 0 0xc 0x30000000 0 0x10000000>;
- };
- };
-};
-
-/include/ "fsl/t4240si-post.dtsi"