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author | Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> | 2020-07-09 08:59:25 +0530 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-07-20 22:57:57 +1000 |
commit | 33699023f51f96ac9be38747e64967ea05e00bab (patch) | |
tree | 0d95325c99fb1ade4606fada813d3f045a170d24 /arch/powerpc/include/asm/book3s/64/hash-64k.h | |
parent | powerpc/book3s64/pkeys: Use PVR check instead of cpu feature (diff) | |
download | linux-dev-33699023f51f96ac9be38747e64967ea05e00bab.tar.xz linux-dev-33699023f51f96ac9be38747e64967ea05e00bab.zip |
powerpc/book3s64/pkeys: Fixup bit numbering
This number the pkey bit such that it is easy to follow. PKEY_BIT0 is
the lower order bit. This makes further changes easy to follow.
No functional change in this patch other than linux page table for
hash translation now maps pkeys differently.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200709032946.881753-3-aneesh.kumar@linux.ibm.com
Diffstat (limited to 'arch/powerpc/include/asm/book3s/64/hash-64k.h')
-rw-r--r-- | arch/powerpc/include/asm/book3s/64/hash-64k.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h index 0729c034e56f..0a15fd14cf72 100644 --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h @@ -36,11 +36,11 @@ #define H_PAGE_HASHPTE _RPAGE_RPN43 /* PTE has associated HPTE */ /* memory key bits. */ -#define H_PTE_PKEY_BIT0 _RPAGE_RSV1 -#define H_PTE_PKEY_BIT1 _RPAGE_RSV2 +#define H_PTE_PKEY_BIT4 _RPAGE_RSV1 +#define H_PTE_PKEY_BIT3 _RPAGE_RSV2 #define H_PTE_PKEY_BIT2 _RPAGE_RSV3 -#define H_PTE_PKEY_BIT3 _RPAGE_RSV4 -#define H_PTE_PKEY_BIT4 _RPAGE_RSV5 +#define H_PTE_PKEY_BIT1 _RPAGE_RSV4 +#define H_PTE_PKEY_BIT0 _RPAGE_RSV5 /* * We need to differentiate between explicit huge page and THP huge |