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| author |   Christophe Leroy <christophe.leroy@c-s.fr> | 2018-02-22 15:27:28 +0100 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2018-03-06 09:21:23 +1100 |
| commit | 15472423ce47d6397d08d48daaae8590c9f9f242 (patch) | |
| tree | 7f06b7bf75af5c3649a3c4f28144e4a50b3da72e /arch/powerpc/include/asm/book3s | |
| parent | powerpc/mm/slice: Fix hugepage allocation at hint address on 8xx (diff) | |
| download | linux-dev-15472423ce47d6397d08d48daaae8590c9f9f242.tar.xz linux-dev-15472423ce47d6397d08d48daaae8590c9f9f242.zip | |
powerpc/mm/slice: Allow up to 64 low slices
While the implementation of the "slices" address space allows
a significant amount of high slices, it limits the number of
low slices to 16 due to the use of a single u64 low_slices_psize
element in struct mm_context_t
On the 8xx, the minimum slice size is the size of the area
covered by a single PMD entry, ie 4M in 4K pages mode and 64M in
16K pages mode. This means we could have at least 64 slices.
In order to override this limitation, this patch switches the
handling of low_slices_psize to char array as done already for
high_slices_psize.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/book3s')
| -rw-r--r-- | arch/powerpc/include/asm/book3s/64/mmu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h index 0abeb0e2d616..bef6e39ed63a 100644 --- a/arch/powerpc/include/asm/book3s/64/mmu.h +++ b/arch/powerpc/include/asm/book3s/64/mmu.h @@ -91,7 +91,8 @@ typedef struct { struct npu_context *npu_context; #ifdef CONFIG_PPC_MM_SLICES - u64 low_slices_psize; /* SLB page size encodings */ + /* SLB page size encodings*/ + unsigned char low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE]; unsigned char high_slices_psize[SLICE_ARRAY_SIZE]; unsigned long slb_addr_limit; #else |