diff options
| author |   Kokoris, Ioannis <ioannis.kokoris@siemens-enterprise.com> | 2011-11-11 17:05:11 +0100 |
|---|---|---|
| committer |   Kumar Gala <galak@kernel.crashing.org> | 2012-07-10 07:08:58 -0500 |
| commit | e65650e6c3eb67226eda80a21f62b7aa145878f4 (patch) | |
| tree | 9fe3c6ecf29385a4890c83724ef5be42b1e0328d /arch/powerpc/include/asm/immap_qe.h | |
| parent | powerpc/85xx: MPC8572DS - Update the MSI interrupts into 4-cell format (diff) | |
| download | linux-dev-e65650e6c3eb67226eda80a21f62b7aa145878f4.tar.xz linux-dev-e65650e6c3eb67226eda80a21f62b7aa145878f4.zip | |
powerpc/qe: set IReady in QE Microcode Upload
QE Microcode Initialization using qe_upload_microcode() does not work on
P1021 if the IRAM-Ready register is not set after the microcode upload. Add
a definition for the "I-RAM Ready" register and sets it upon microcode
upload completion.
Signed-off-by: Ioannis Kokkoris <ioannis.kokoris@siemens-enterprise.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/immap_qe.h')
| -rw-r--r-- | arch/powerpc/include/asm/immap_qe.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h index 0edb6842b13d..61e8490786b8 100644 --- a/arch/powerpc/include/asm/immap_qe.h +++ b/arch/powerpc/include/asm/immap_qe.h @@ -26,7 +26,9 @@ struct qe_iram { __be32 iadd; /* I-RAM Address Register */ __be32 idata; /* I-RAM Data Register */ - u8 res0[0x78]; + u8 res0[0x04]; + __be32 iready; /* I-RAM Ready Register */ + u8 res1[0x70]; } __attribute__ ((packed)); /* QE Interrupt Controller */ |