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authorChristoph Hellwig <hch@lst.de>2020-01-06 09:43:50 +0100
committerChristoph Hellwig <hch@lst.de>2020-01-06 09:45:59 +0100
commit4bdc0d676a643140bdf17dbf7eafedee3d496a3c (patch)
tree2186c48b764fcc52016904d39af3486b8691fd63 /arch/powerpc/include/asm/io.h
parentMIPS: define ioremap_nocache to ioremap (diff)
downloadlinux-dev-4bdc0d676a643140bdf17dbf7eafedee3d496a3c.tar.xz
linux-dev-4bdc0d676a643140bdf17dbf7eafedee3d496a3c.zip
remove ioremap_nocache and devm_ioremap_nocache
ioremap has provided non-cached semantics by default since the Linux 2.6 days, so remove the additional ioremap_nocache interface. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/powerpc/include/asm/io.h')
-rw-r--r--arch/powerpc/include/asm/io.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index a63ec938636d..635969b5b58e 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -691,8 +691,6 @@ static inline void iosync(void)
* * ioremap_prot allows to specify the page flags as an argument and can
* also be hooked by the platform via ppc_md.
*
- * * ioremap_nocache is identical to ioremap
- *
* * ioremap_wc enables write combining
*
* * ioremap_wt enables write through
@@ -715,7 +713,6 @@ extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size,
extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size);
void __iomem *ioremap_wt(phys_addr_t address, unsigned long size);
void __iomem *ioremap_coherent(phys_addr_t address, unsigned long size);
-#define ioremap_nocache(addr, size) ioremap((addr), (size))
#define ioremap_uc(addr, size) ioremap((addr), (size))
#define ioremap_cache(addr, size) \
ioremap_prot((addr), (size), pgprot_val(PAGE_KERNEL))