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authorBharata B Rao <bharata@linux.ibm.com>2020-07-03 11:06:06 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2020-07-16 13:00:21 +1000
commit029ab30b4c0a7ec587eece1ec07c3981fdff2bed (patch)
tree07f443c331f0961a38b1c6d28dad74eb61e2f7c9 /arch/powerpc/include/asm/mmu.h
parentpowerpc/vdso64: Switch from __get_datapage() to get_datapage inline macro (diff)
downloadlinux-dev-029ab30b4c0a7ec587eece1ec07c3981fdff2bed.tar.xz
linux-dev-029ab30b4c0a7ec587eece1ec07c3981fdff2bed.zip
powerpc/mm: Enable radix GTSE only if supported.
Make GTSE an MMU feature and enable it by default for radix. However for guest, conditionally enable it if hypervisor supports it via OV5 vector. Let prom_init ask for radix GTSE only if the support exists. Having GTSE as an MMU feature will make it easy to enable radix without GTSE. Currently radix assumes GTSE is enabled by default. Signed-off-by: Bharata B Rao <bharata@linux.ibm.com> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200703053608.12884-2-bharata@linux.ibm.com
Diffstat (limited to 'arch/powerpc/include/asm/mmu.h')
-rw-r--r--arch/powerpc/include/asm/mmu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index f4ac25d4df05..884d51995934 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -28,6 +28,9 @@
* Individual features below.
*/
+/* Guest Translation Shootdown Enable */
+#define MMU_FTR_GTSE ASM_CONST(0x00001000)
+
/*
* Support for 68 bit VA space. We added that from ISA 2.05
*/
@@ -173,6 +176,7 @@ enum {
#endif
#ifdef CONFIG_PPC_RADIX_MMU
MMU_FTR_TYPE_RADIX |
+ MMU_FTR_GTSE |
#ifdef CONFIG_PPC_KUAP
MMU_FTR_RADIX_KUAP |
#endif /* CONFIG_PPC_KUAP */