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| author |   Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2016-08-24 15:03:38 +0530 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2016-09-13 17:37:10 +1000 |
| commit | c6d1a767b9eaa74f0969378ec47791ff8318a65c (patch) | |
| tree | 466508d46813a767307358da73a45c77f2cab7b9 /arch/powerpc/include/asm/nohash/64/pgtable.h | |
| parent | powerpc/mm/radix: Use different RTS encoding for different POWER9 revs (diff) | |
| download | linux-dev-c6d1a767b9eaa74f0969378ec47791ff8318a65c.tar.xz linux-dev-c6d1a767b9eaa74f0969378ec47791ff8318a65c.zip | |
powerpc/mm/radix: Use different pte update sequence for different POWER9 revs
POWER9 DD1 requires pte to be marked invalid (V=0) before updating
it with the new value. This makes this distinction for the different
revisions.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/nohash/64/pgtable.h')
| -rw-r--r-- | arch/powerpc/include/asm/nohash/64/pgtable.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h index d4d808cf905e..653a1838469d 100644 --- a/arch/powerpc/include/asm/nohash/64/pgtable.h +++ b/arch/powerpc/include/asm/nohash/64/pgtable.h @@ -300,7 +300,8 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, /* Set the dirty and/or accessed bits atomically in a linux PTE, this * function doesn't need to flush the hash entry */ -static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry) +static inline void __ptep_set_access_flags(struct mm_struct *mm, + pte_t *ptep, pte_t entry) { unsigned long bits = pte_val(entry) & (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC); |