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| author |   Christophe Leroy <christophe.leroy@csgroup.eu> | 2020-11-24 15:24:59 +0000 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2020-12-09 23:48:13 +1100 |
| commit | 70b588a068668dd7a92ed19cf0373ba92847957c (patch) | |
| tree | 3e96b07163f00bdee334df1eb6a8ff3bfb3c1aeb /arch/powerpc/include/asm/ppc-opcode.h | |
| parent | powerpc/8xx: Use SPRN_SPRG_SCRATCH2 in DTLB miss exception (diff) | |
| download | linux-dev-70b588a068668dd7a92ed19cf0373ba92847957c.tar.xz linux-dev-70b588a068668dd7a92ed19cf0373ba92847957c.zip | |
powerpc/ppc-opcode: Add PPC_RAW_MFSPR()
Add PPC_RAW_MFSPR() to replace open coding done in 8xx-pmu.c
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/e281e3a611eead8817c49cf06a60072a021af823.1606231483.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'arch/powerpc/include/asm/ppc-opcode.h')
| -rw-r--r-- | arch/powerpc/include/asm/ppc-opcode.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index a6e3700c4566..da6f300e9788 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h @@ -230,7 +230,6 @@ #define PPC_INST_POPCNTB_MASK 0xfc0007fe #define PPC_INST_RFEBB 0x4c000124 #define PPC_INST_RFID 0x4c000024 -#define PPC_INST_MFSPR 0x7c0002a6 #define PPC_INST_MFSPR_DSCR 0x7c1102a6 #define PPC_INST_MFSPR_DSCR_MASK 0xfc1ffffe #define PPC_INST_MTSPR_DSCR 0x7c1103a6 @@ -507,6 +506,8 @@ #define PPC_RAW_NEG(d, a) (0x7c0000d0 | ___PPC_RT(d) | ___PPC_RA(a)) +#define PPC_RAW_MFSPR(d, spr) (0x7c0002a6 | ___PPC_RT(d) | __PPC_SPR(spr)) + /* Deal with instructions that older assemblers aren't aware of */ #define PPC_BCCTR_FLUSH stringify_in_c(.long PPC_INST_BCCTR_FLUSH) #define PPC_CP_ABORT stringify_in_c(.long PPC_RAW_CP_ABORT) |