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authorNishanth Aravamudan <nacc@linux.vnet.ibm.com>2013-01-18 09:17:36 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-01-29 11:35:09 +1100
commit71cf1def1ad8384d5fa008f96de94b36668e5460 (patch)
treead20be4201314d8534b616a745ed1621364023ff /arch/powerpc/kernel/smp.c
parentpseries/iommu: Fix iteration in DDW TCE clearrange (diff)
downloadlinux-dev-71cf1def1ad8384d5fa008f96de94b36668e5460.tar.xz
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pseries/iommu: Ensure TCEs are cleared with non-huge DDW
There are now two kinds of DMA windows that might be presented by PowerVM DDW support -- huge windows (that can map all of system memory regardless of the LPAR configuration) and non-huge windows (which can't). They are implemented slightly differently in PowerVM, and thus have different characteristics. The most obvious is that slot isolate doesn't clear the TCEs/window for us with non-huge windows. Thus, when a DLPAR operation occurs on a slot using a non-huge window, TCEs are still present (the notifier chain doesn't currently remove them explicitly) and the DLPAR fails. Fix this by calling remove_ddw() first, which will unmap the DDW TCEs. Note: a corresponding change to drmgr is needed to actually successfully DLPAR, such that the device-tree update (which causes the notifier chain to fire) occurs before slot isolate. Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/smp.c')
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