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authorNicholas Piggin <npiggin@gmail.com>2019-09-03 01:29:30 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2019-09-05 14:22:41 +1000
commit7d805accbec57a151bd0dd305a1109feebdfd4a4 (patch)
tree74b29ce6b0e206b947a45f88bd01906b1e201406 /arch/powerpc/mm/book3s64/pgtable.c
parentpowerpc/64s/pseries: radix flush translations before MMU is enabled at boot (diff)
downloadlinux-dev-7d805accbec57a151bd0dd305a1109feebdfd4a4.tar.xz
linux-dev-7d805accbec57a151bd0dd305a1109feebdfd4a4.zip
powerpc/64s: remove unnecessary translation cache flushes at boot
The various translation structure invalidations performed in early boot when the MMU is off are not required, because everything is invalidated immediately before a CPU first enables its MMU (see early_init_mmu and early_init_mmu_secondary). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20190902152931.17840-6-npiggin@gmail.com
Diffstat (limited to 'arch/powerpc/mm/book3s64/pgtable.c')
-rw-r--r--arch/powerpc/mm/book3s64/pgtable.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c
index 6fab9c0bbbaf..351eb78eed55 100644
--- a/arch/powerpc/mm/book3s64/pgtable.c
+++ b/arch/powerpc/mm/book3s64/pgtable.c
@@ -252,6 +252,11 @@ void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
pr_info("PATE registered by ultravisor: dw0 = 0x%lx, dw1 = 0x%lx\n",
dw0, dw1);
} else if (flush) {
+ /*
+ * Boot does not need to flush, because MMU is off and each
+ * CPU does a tlbiel_all() before switching them on, which
+ * flushes everything.
+ */
flush_partition(lpid, (old & PATB_HR));
}
}