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| author |   Christophe Leroy <christophe.leroy@c-s.fr> | 2019-02-21 19:08:51 +0000 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2019-02-23 21:04:32 +1100 |
| commit | d5f17ee96447736a84bc44ffc4b0dddb1b519222 (patch) | |
| tree | 6cd30783636f3e54bdec42c13b3e95af096762c6 /arch/powerpc/mm/init_32.c | |
| parent | powerpc/kconfig: make _etext and data areas alignment configurable on Book3s 32 (diff) | |
| download | linux-dev-d5f17ee96447736a84bc44ffc4b0dddb1b519222.tar.xz linux-dev-d5f17ee96447736a84bc44ffc4b0dddb1b519222.zip | |
powerpc/8xx: don't disable large TLBs with CONFIG_STRICT_KERNEL_RWX
This patch implements handling of STRICT_KERNEL_RWX with
large TLBs directly in the TLB miss handlers.
To do so, etext and sinittext are aligned on 512kB boundaries
and the miss handlers use 512kB pages instead of 8Mb pages for
addresses close to the boundaries.
It sets RO PP flags for addresses under sinittext.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/mm/init_32.c')
| -rw-r--r-- | arch/powerpc/mm/init_32.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index bc28995a37ea..41a3513cadc9 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c @@ -108,7 +108,7 @@ static void __init MMU_setup(void) __map_without_bats = 1; __map_without_ltlbs = 1; } - if (strict_kernel_rwx_enabled()) + if (strict_kernel_rwx_enabled() && !IS_ENABLED(CONFIG_PPC_8xx)) __map_without_ltlbs = 1; } |