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authorMadhavan Srinivasan <maddy@linux.ibm.com>2021-04-29 10:32:08 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2022-06-29 19:42:41 +1000
commit5969e0c1c7e2132d8b2cf80168072b1195ddce46 (patch)
tree216808b242c1c1429aa32d6ec5d0246d140025b5 /arch/powerpc/perf/isa207-common.h
parentpowerpc/pseries/iommu: Print ibm,query-pe-dma-windows parameters (diff)
downloadlinux-dev-5969e0c1c7e2132d8b2cf80168072b1195ddce46.tar.xz
linux-dev-5969e0c1c7e2132d8b2cf80168072b1195ddce46.zip
powerpc/perf: Update MMCR2 to support event exclude_idle
struct perf_event_attr supports exclude counting of idle task. This is sent to kernel via perf_event_attr.exclude_idle and in perf tool, user can use ":I" event modifier to enable this for specific event. Monitor Mode Control Register 2 (MMCR2) SPR has control bits for each PMCs to freeze counting based on the Control Register CTRL[RUN] state. CTRL[RUN] is not set when idle task is running. Patch adds a check for event attr.exclude_idle to set MMCR2[FCnWAIT] bit. Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210429050208.266619-1-maddy@linux.ibm.com
Diffstat (limited to 'arch/powerpc/perf/isa207-common.h')
-rw-r--r--arch/powerpc/perf/isa207-common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h
index ff122603989b..f594fa6580d1 100644
--- a/arch/powerpc/perf/isa207-common.h
+++ b/arch/powerpc/perf/isa207-common.h
@@ -249,6 +249,7 @@
/* Bits in MMCR2 for PowerISA v2.07 */
#define MMCR2_FCS(pmc) (1ull << (63 - (((pmc) - 1) * 9)))
#define MMCR2_FCP(pmc) (1ull << (62 - (((pmc) - 1) * 9)))
+#define MMCR2_FCWAIT(pmc) (1ull << (58 - (((pmc) - 1) * 9)))
#define MMCR2_FCH(pmc) (1ull << (57 - (((pmc) - 1) * 9)))
#define MAX_ALT 2