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author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-10 10:13:37 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-10 10:13:37 -0700 |
commit | d6075262969321bcb5d795de25595fc2a141ac02 (patch) | |
tree | 8b9021abdbec609fb44a265af7362c4fbed30b37 /arch/powerpc/perf | |
parent | Merge tag 'for-5.1/dm-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm (diff) | |
parent | nios2: Fix update_mmu_cache preload the TLB with the new PTE (diff) | |
download | linux-dev-d6075262969321bcb5d795de25595fc2a141ac02.tar.xz linux-dev-d6075262969321bcb5d795de25595fc2a141ac02.zip |
Merge tag 'nios2-v5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2
Pull nios2 updates from Ley Foon Tan:
"Most of updates are MMU related"
* tag 'nios2-v5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2:
nios2: Fix update_mmu_cache preload the TLB with the new PTE
nios2: update_mmu_cache preload the TLB with the new PTE
nios2: User address TLB flush break after finding the matching entry
nios2: flush_tlb_all use TLBMISC way auto-increment feature
nios2: improve readability of tlb functions
nios2: flush_tlb_mm flush only the pid
nios2: flush_tlb_pid can just restore TLBMISC once
nios2: TLBMISC writes do not require PID bits to be set
nios2: Use an invalid TLB entry address helper function
nios2: pte_clear does not need to flush TLB
nios2: flush_tlb_page use PID based flush
nios2: update_mmu_cache clear the old entry from the TLB
nios2: remove redundant 'default n' from Kconfig-s
nios2: ksyms: Add missing symbol exports
Diffstat (limited to 'arch/powerpc/perf')
0 files changed, 0 insertions, 0 deletions