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authorNicholas Piggin <npiggin@gmail.com>2017-06-13 23:05:57 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2017-06-19 19:46:30 +1000
commit40d24343a8926b6998a13d04aa54e04961d1f5ed (patch)
treeeb9a20de3bdc69ee0817cae1f8cd3e7c770e3806 /arch/powerpc/platforms/powernv/idle.c
parentpowerpc/64s/idle: Predict HMI wakeup as unlikely (diff)
downloadlinux-dev-40d24343a8926b6998a13d04aa54e04961d1f5ed.tar.xz
linux-dev-40d24343a8926b6998a13d04aa54e04961d1f5ed.zip
powerpc/64s/idle: Run latch switch is done with MSR[EE]=0
In the idle sleep/wake code we know that MSR[EE] is clear, so we can avoid 2 x mfmsr and 2 x mtmsr by calling the double-underscore versions of the run latch routines which assume interrupts are already disabled. Acked-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/platforms/powernv/idle.c')
-rw-r--r--arch/powerpc/platforms/powernv/idle.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
index 1028df82cd2f..2abee070373f 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -291,9 +291,9 @@ static unsigned long __power7_idle_type(unsigned long type)
if (!prep_irq_for_idle_irqsoff())
return 0;
- ppc64_runlatch_off();
+ __ppc64_runlatch_off();
srr1 = power7_idle_insn(type);
- ppc64_runlatch_on();
+ __ppc64_runlatch_on();
fini_irq_for_idle_irqsoff();
@@ -328,9 +328,9 @@ static unsigned long __power9_idle_type(unsigned long stop_psscr_val,
psscr = mfspr(SPRN_PSSCR);
psscr = (psscr & ~stop_psscr_mask) | stop_psscr_val;
- ppc64_runlatch_off();
+ __ppc64_runlatch_off();
srr1 = power9_idle_stop(psscr);
- ppc64_runlatch_on();
+ __ppc64_runlatch_on();
fini_irq_for_idle_irqsoff();
@@ -365,7 +365,7 @@ unsigned long pnv_cpu_offline(unsigned int cpu)
unsigned long srr1;
u32 idle_states = pnv_get_supported_cpuidle_states();
- ppc64_runlatch_off();
+ __ppc64_runlatch_off();
if (cpu_has_feature(CPU_FTR_ARCH_300) && deepest_stop_found) {
unsigned long psscr;
@@ -392,7 +392,7 @@ unsigned long pnv_cpu_offline(unsigned int cpu)
HMT_medium();
}
- ppc64_runlatch_on();
+ __ppc64_runlatch_on();
return srr1;
}