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authorOlof Johansson <olof@lixom.net>2006-09-06 14:35:19 -0500
committerPaul Mackerras <paulus@samba.org>2006-09-13 18:39:52 +1000
commit0024300000769eadcb4a4fcdff531d45ee7735d4 (patch)
tree18a94c4df1716a59a80b8b6934e55a75677f26c3 /arch/powerpc
parent[POWERPC] powerpc: Reduce default cacheline size to 64 bytes (diff)
downloadlinux-dev-0024300000769eadcb4a4fcdff531d45ee7735d4.tar.xz
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[POWERPC] powerpc: Divorce CPU_FTR_CTRL from CPU_FTR_PPCAS_ARCH_V2_BASE
The performance monitor implementation (including CTRL register behaviour) is just included in PPC v2 as an example, it's not truly part of the base. It's actually a somewhat misleading feature, but I'll leave that be for now: The presence of the register is not what the feature bit is used for, but instead it's used to determine if it contains the runlatch bit for idle reporting of the performance monitor. For alternative implementations, the register might still exist but the bit might have different meaning (or no meaning at all). For now, split it off and don't include it in CPU_FTR_PPCAS_ARCH_V2_BASE. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
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