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authorPaul Mackerras <paulus@samba.org>2009-06-12 21:10:05 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-06-15 13:27:38 +1000
commit09d4e0edd4614e787393acc582ac701c6ec3565b (patch)
tree77f3b85e0f59a168ac78639e510ebcbd3791b3d2 /arch/powerpc
parentpowerpc: Add compiler memory barrier to mtmsr macro (diff)
downloadlinux-dev-09d4e0edd4614e787393acc582ac701c6ec3565b.tar.xz
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lib: Provide generic atomic64_t implementation
Many processor architectures have no 64-bit atomic instructions, but we need atomic64_t in order to support the perf_counter subsystem. This adds an implementation of 64-bit atomic operations using hashed spinlocks to provide atomicity. For each atomic operation, the address of the atomic64_t variable is hashed to an index into an array of 16 spinlocks. That spinlock is taken (with interrupts disabled) around the operation, which can then be coded non-atomically within the lock. On UP, all the spinlock manipulation goes away and we simply disable interrupts around each operation. In fact gcc eliminates the whole atomic64_lock variable as well. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
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