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| author |   Alistair Popple <alistair@popple.id.au> | 2020-05-21 11:43:35 +1000 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2020-06-02 20:59:19 +1000 |
| commit | ee988c11acf6f9464b7b44e9a091bf6afb3b3a49 (patch) | |
| tree | 7350e140cfbdedd1733ae6049ef51211a9b3716f /arch/powerpc | |
| parent | powerpc/64s: Don't set FSCR bits in INIT_THREAD (diff) | |
| download | linux-dev-ee988c11acf6f9464b7b44e9a091bf6afb3b3a49.tar.xz linux-dev-ee988c11acf6f9464b7b44e9a091bf6afb3b3a49.zip | |
powerpc: Add new HWCAP bits
POWER10 introduces two new architectural features - ISAv3.1 and matrix
multiply assist (MMA) instructions. Userspace detects the presence
of these features via two HWCAP bits introduced in this patch. These
bits have been agreed to by the compiler and binutils team.
According to ISAv3.1 MMA is an optional feature and software that makes
use of it should first check for availability via this HWCAP bit and use
alternate code paths if unavailable.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Tested-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200521014341.29095-2-alistair@popple.id.au
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/include/uapi/asm/cputable.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/uapi/asm/cputable.h b/arch/powerpc/include/uapi/asm/cputable.h index 540592034740..731b97dc2d15 100644 --- a/arch/powerpc/include/uapi/asm/cputable.h +++ b/arch/powerpc/include/uapi/asm/cputable.h @@ -50,6 +50,8 @@ #define PPC_FEATURE2_DARN 0x00200000 /* darn random number insn */ #define PPC_FEATURE2_SCV 0x00100000 /* scv syscall */ #define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000 /* TM w/out suspended state */ +#define PPC_FEATURE2_ARCH_3_1 0x00040000 /* ISA 3.1 */ +#define PPC_FEATURE2_MMA 0x00020000 /* Matrix Multiply Assist */ /* * IMPORTANT! |