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authorKaiGai Kohei <kaigai@ak.jp.nec.com>2006-05-19 00:43:53 +0900
committerKaiGai Kohei <kaigai@ak.jp.nec.com>2006-05-19 00:43:53 +0900
commit20a92fc74c5c91c7bc5693d51acc2b99aceb0465 (patch)
tree41bf535f38ff1a29c560bcf622e9b4ef03c2c106 /arch/ppc/kernel/head_8xx.S
parent[JFFS2][XATTR] Fix obvious typo (diff)
parent[MTD] Fix printk format error in gen_probe.c (diff)
downloadlinux-dev-20a92fc74c5c91c7bc5693d51acc2b99aceb0465.tar.xz
linux-dev-20a92fc74c5c91c7bc5693d51acc2b99aceb0465.zip
Merge git://git.infradead.org/mtd-2.6
Diffstat (limited to 'arch/ppc/kernel/head_8xx.S')
-rw-r--r--arch/ppc/kernel/head_8xx.S4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index ec53c7d65f2b..7a2f20583be4 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -355,9 +355,7 @@ InstructionTLBMiss:
. = 0x1200
DataStoreTLBMiss:
-#ifdef CONFIG_8xx_CPU6
stw r3, 8(r0)
-#endif
DO_8xx_CPU6(0x3f80, r3)
mtspr SPRN_M_TW, r10 /* Save a couple of working registers */
mfcr r10
@@ -417,9 +415,7 @@ DataStoreTLBMiss:
lwz r11, 0(r0)
mtcr r11
lwz r11, 4(r0)
-#ifdef CONFIG_8xx_CPU6
lwz r3, 8(r0)
-#endif
rfi
/* This is an instruction TLB error on the MPC8xx. This could be due