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| author |   Marcelo Tosatti <marcelo.tosatti@cyclades.com> | 2005-11-24 11:32:09 -0200 |
|---|---|---|
| committer |   Paul Mackerras <paulus@samba.org> | 2006-01-09 14:50:51 +1100 |
| commit | fb64c2446b20bf0206a690e9e1df88b25ac421e6 (patch) | |
| tree | 53d6e17957d29d881f8cff83ed952b4229d811bd /arch/ppc/syslib/m8xx_setup.c | |
| parent | [PATCH] Fix code that saves NVGPRS in 32-bit signal frame (diff) | |
| download | linux-dev-fb64c2446b20bf0206a690e9e1df88b25ac421e6.tar.xz linux-dev-fb64c2446b20bf0206a690e9e1df88b25ac421e6.zip | |
[PATCH] ppc32: m8xx watchdog update
This updates m8xx_wdt as follows:
1) Remove now obsolete fpos check in the write() function. The driver is
currently non functional due to this bug.
2) Use in/out macros for register access.
3) Allows m8xx_wdt to use a kernel timer instead of the builtin RTC/PIT
for keep-alive trigger (which is responsible for servicing the watchdog
until an userspace application takes over). For instance Cyclades PRxK
boards (MPC 855T based) have a non-functional internal RTC/PIT unit.
Behaviour for boards with RTC/PIT is unchaged.
4) The last change required moving the RTCSC register setting code
to a weak function which can be overriden by board specific files.
Otherwise the timer init code trashes the register making it impossible
for m8xx_wdt to detect the situation.
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/syslib/m8xx_setup.c')
| -rw-r--r-- | arch/ppc/syslib/m8xx_setup.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c index 1cc3abe6fa43..688616de3cde 100644 --- a/arch/ppc/syslib/m8xx_setup.c +++ b/arch/ppc/syslib/m8xx_setup.c @@ -135,6 +135,16 @@ static struct irqaction tbint_irqaction = { .name = "tbint", }; +/* per-board overridable init_internal_rtc() function. */ +void __init __attribute__ ((weak)) +init_internal_rtc(void) +{ + /* Disable the RTC one second and alarm interrupts. */ + out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE)); + /* Enable the RTC */ + out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE)); +} + /* The decrementer counts at the system (internal) clock frequency divided by * sixteen, or external oscillator divided by four. We force the processor * to use system clock divided by sixteen. @@ -183,10 +193,7 @@ void __init m8xx_calibrate_decr(void) out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, KAPWR_KEY); out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, KAPWR_KEY); - /* Disable the RTC one second and alarm interrupts. */ - out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE)); - /* Enable the RTC */ - out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE)); + init_internal_rtc(); /* Enabling the decrementer also enables the timebase interrupts * (or from the other point of view, to get decrementer interrupts |