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| author |   Atish Patra <atish.patra@wdc.com> | 2018-10-02 12:15:03 -0700 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@sifive.com> | 2018-10-22 17:03:37 -0700 |
| commit | a37d56fc401108f39dec9ba83ed923a453937a26 (patch) | |
| tree | b050e592dc352a44bddc333ead5602abbab2e7a4 /arch/riscv/include/asm | |
| parent | RISC-V: Use mmgrab() (diff) | |
| download | linux-dev-a37d56fc401108f39dec9ba83ed923a453937a26.tar.xz linux-dev-a37d56fc401108f39dec9ba83ed923a453937a26.zip | |
RISC-V: Use WRITE_ONCE instead of direct access
The secondary harts spin on couple of per cpu variables until both of
these are non-zero so it's not necessary to have any ordering here.
However, WRITE_ONCE should be used to avoid tearing.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv/include/asm')
0 files changed, 0 insertions, 0 deletions