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| author |   Jim Wilson <jimw@sifive.com> | 2018-10-17 17:59:05 -0700 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@sifive.com> | 2018-10-22 17:38:04 -0700 |
| commit | b8c8a9590e4fde82f8c3ee06a521763e6f21e9c8 (patch) | |
| tree | c87efbb682f18144e651ecdfd79d95c71bf26087 /arch/riscv/include | |
| parent | RISC-V: Mask out the F extension on systems without D (diff) | |
| download | linux-dev-b8c8a9590e4fde82f8c3ee06a521763e6f21e9c8.tar.xz linux-dev-b8c8a9590e4fde82f8c3ee06a521763e6f21e9c8.zip | |
RISC-V: Add FP register ptrace support for gdb.
Add a variable and a macro to describe FP registers, assuming only D is
supported. FP code is conditional on CONFIG_FPU. The FP regs and FCSR
are copied separately to avoid copying struct padding. Tested by hand and
with the gdb testsuite.
Signed-off-by: Jim Wilson <jimw@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv/include')
| -rw-r--r-- | arch/riscv/include/uapi/asm/elf.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h index 1e0dfc36aab9..644a00ce6e2e 100644 --- a/arch/riscv/include/uapi/asm/elf.h +++ b/arch/riscv/include/uapi/asm/elf.h @@ -19,7 +19,10 @@ typedef unsigned long elf_greg_t; typedef struct user_regs_struct elf_gregset_t; #define ELF_NGREG (sizeof(elf_gregset_t) / sizeof(elf_greg_t)) +/* We don't support f without d, or q. */ +typedef __u64 elf_fpreg_t; typedef union __riscv_fp_state elf_fpregset_t; +#define ELF_NFPREG (sizeof(struct __riscv_d_ext_state) / sizeof(elf_fpreg_t)) #if __riscv_xlen == 64 #define ELF_RISCV_R_SYM(r_info) ELF64_R_SYM(r_info) |