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authorAtish Patra <atishp@rivosinc.com>2022-07-29 17:14:11 +0530
committerAnup Patel <anup@brainfault.org>2022-07-29 17:14:11 +0530
commit9bfd900beeecaba009ccde8cf13716d3cac4d2e1 (patch)
treed0a5e62e041debf2f084b9e64f4347050c7f654e /arch/riscv/kvm/mmu.c
parentLinux 5.19-rc8 (diff)
downloadlinux-dev-9bfd900beeecaba009ccde8cf13716d3cac4d2e1.tar.xz
linux-dev-9bfd900beeecaba009ccde8cf13716d3cac4d2e1.zip
RISC-V: KVM: Improve ISA extension by using a bitmap
Currently, the every vcpu only stores the ISA extensions in a unsigned long which is not scalable as number of extensions will continue to grow. Using a bitmap allows the ISA extension to support any number of extensions. The CONFIG one reg interface implementation is modified to support the bitmap as well. But it is meant only for base extensions. Thus, the first element of the bitmap array is sufficient for that interface. In the future, all the new multi-letter extensions must use the ISA_EXT one reg interface that allows enabling/disabling any extension now. Signed-off-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv/kvm/mmu.c')
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