diff options
| author |   Damien Le Moal <damien.lemoal@wdc.com> | 2019-10-28 13:10:39 +0100 |
|---|---|---|
| committer |   Paul Walmsley <paul.walmsley@sifive.com> | 2019-11-17 15:17:39 -0800 |
| commit | accb9dbc4affdb7ebf30db7e9ba71eee47280081 (patch) | |
| tree | 343100142069604e557a7d1cc9ffb1397928d3f3 /arch/riscv | |
| parent | riscv: provide native clint access for M-mode (diff) | |
| download | linux-dev-accb9dbc4affdb7ebf30db7e9ba71eee47280081.tar.xz linux-dev-accb9dbc4affdb7ebf30db7e9ba71eee47280081.zip | |
riscv: read the hart ID from mhartid on boot
When in M-Mode, we can use the mhartid CSR to get the ID of the running
HART. Doing so, direct M-Mode boot without firmware is possible.
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/include/asm/csr.h | 1 | ||||
| -rw-r--r-- | arch/riscv/kernel/head.S | 8 |
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 0ab642811028..318192c66fd8 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -99,6 +99,7 @@ #define CSR_MCAUSE 0x342 #define CSR_MTVAL 0x343 #define CSR_MIP 0x344 +#define CSR_MHARTID 0xf14 #ifdef CONFIG_RISCV_M_MODE # define CSR_STATUS CSR_MSTATUS diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 5cfd2c582945..fc9973086946 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -50,6 +50,14 @@ _start_kernel: csrw CSR_IE, zero csrw CSR_IP, zero +#ifdef CONFIG_RISCV_M_MODE + /* + * The hartid in a0 is expected later on, and we have no firmware + * to hand it to us. + */ + csrr a0, CSR_MHARTID +#endif + /* Load the global pointer */ .option push .option norelax |