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authorChristoph Hellwig <hch@lst.de>2019-10-16 08:09:38 +0200
committerChristoph Hellwig <hch@lst.de>2019-11-11 21:18:19 +0100
commitd092a87073269677b7ff09e71a8d91912b7f969a (patch)
treee86ed34b3710397845f249bf12ff9ef88463df20 /arch/riscv
parentasm-generic: don't provide ioremap for CONFIG_MMU (diff)
downloadlinux-dev-d092a87073269677b7ff09e71a8d91912b7f969a.tar.xz
linux-dev-d092a87073269677b7ff09e71a8d91912b7f969a.zip
arch: rely on asm-generic/io.h for default ioremap_* definitions
Various architectures that use asm-generic/io.h still defined their own default versions of ioremap_nocache, ioremap_wt and ioremap_wc that point back to plain ioremap directly or indirectly. Remove these definitions and rely on asm-generic/io.h instead. For this to work the backup ioremap_* defintions needs to be changed to purely cpp macros instea of inlines to cover for architectures like openrisc that only define ioremap after including <asm-generic/io.h>. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Palmer Dabbelt <palmer@dabbelt.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/include/asm/io.h10
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
index 3ba4d93721d3..8a5733c09e45 100644
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -16,16 +16,6 @@
#include <asm/pgtable.h>
extern void __iomem *ioremap(phys_addr_t offset, unsigned long size);
-
-/*
- * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't
- * change the properties of memory regions. This should be fixed by the
- * upcoming platform spec.
- */
-#define ioremap_nocache(addr, size) ioremap((addr), (size))
-#define ioremap_wc(addr, size) ioremap((addr), (size))
-#define ioremap_wt(addr, size) ioremap((addr), (size))
-
extern void iounmap(volatile void __iomem *addr);
/* Generic IO read/write. These perform native-endian accesses. */