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| author |   Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-07-04 13:13:55 -0700 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-07-04 13:13:55 -0700 |
| commit | 404c3bc30cb1361e1b3533643326ab472d24a618 (patch) | |
| tree | 156cc9032c8aee17167d926c5bdae009ba8f36d2 /arch/s390/include/asm/barrier.h | |
| parent | Input: wacom - TPC2FG doesn't store touch id for slots (diff) | |
| parent | Linux 3.5-rc5 (diff) | |
| download | linux-dev-404c3bc30cb1361e1b3533643326ab472d24a618.tar.xz linux-dev-404c3bc30cb1361e1b3533643326ab472d24a618.zip | |
Merge commit 'v3.5-rc5' into next
Diffstat (limited to 'arch/s390/include/asm/barrier.h')
| -rw-r--r-- | arch/s390/include/asm/barrier.h | 37 |
1 files changed, 20 insertions, 17 deletions
diff --git a/arch/s390/include/asm/barrier.h b/arch/s390/include/asm/barrier.h index 451273ad4d34..10a508802940 100644 --- a/arch/s390/include/asm/barrier.h +++ b/arch/s390/include/asm/barrier.h @@ -11,25 +11,28 @@ * Force strict CPU ordering. * And yes, this is required on UP too when we're talking * to devices. - * - * This is very similar to the ppc eieio/sync instruction in that is - * does a checkpoint syncronisation & makes sure that - * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ). */ -#define eieio() asm volatile("bcr 15,0" : : : "memory") -#define SYNC_OTHER_CORES(x) eieio() -#define mb() eieio() -#define rmb() eieio() -#define wmb() eieio() -#define read_barrier_depends() do { } while(0) -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#define smp_mb__before_clear_bit() smp_mb() -#define smp_mb__after_clear_bit() smp_mb() +static inline void mb(void) +{ +#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES + /* Fast-BCR without checkpoint synchronization */ + asm volatile("bcr 14,0" : : : "memory"); +#else + asm volatile("bcr 15,0" : : : "memory"); +#endif +} + +#define rmb() mb() +#define wmb() mb() +#define read_barrier_depends() do { } while(0) +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#define smp_read_barrier_depends() read_barrier_depends() +#define smp_mb__before_clear_bit() smp_mb() +#define smp_mb__after_clear_bit() smp_mb() -#define set_mb(var, value) do { var = value; mb(); } while (0) +#define set_mb(var, value) do { var = value; mb(); } while (0) #endif /* __ASM_BARRIER_H */ |