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| author |   Martin Schwidefsky <schwidefsky@de.ibm.com> | 2016-08-23 13:30:24 +0200 |
|---|---|---|
| committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2016-08-29 11:05:04 +0200 |
| commit | 474fd6e80fe529e9adeeb7ea9d4e5d6c4da0b7fe (patch) | |
| tree | a5294d90e6e7205f26c4271cee49199be2a8addb /arch/s390/include/asm/cpacf.h | |
| parent | s390/nmi: improve revalidation of fpu / vector registers (diff) | |
| download | linux-dev-474fd6e80fe529e9adeeb7ea9d4e5d6c4da0b7fe.tar.xz linux-dev-474fd6e80fe529e9adeeb7ea9d4e5d6c4da0b7fe.zip | |
RAID/s390: add SIMD implementation for raid6 gen/xor
Using vector registers is slightly faster:
raid6: vx128x8 gen() 19705 MB/s
raid6: vx128x8 xor() 11886 MB/s
raid6: using algorithm vx128x8 gen() 19705 MB/s
raid6: .... xor() 11886 MB/s, rmw enabled
vs the software algorithms:
raid6: int64x1 gen() 3018 MB/s
raid6: int64x1 xor() 1429 MB/s
raid6: int64x2 gen() 4661 MB/s
raid6: int64x2 xor() 3143 MB/s
raid6: int64x4 gen() 5392 MB/s
raid6: int64x4 xor() 3509 MB/s
raid6: int64x8 gen() 4441 MB/s
raid6: int64x8 xor() 3207 MB/s
raid6: using algorithm int64x4 gen() 5392 MB/s
raid6: .... xor() 3509 MB/s, rmw enabled
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/include/asm/cpacf.h')
0 files changed, 0 insertions, 0 deletions